Introduction:

• Say we wish to access an address in main memory
• The processor communicates this request to the cache
• Two possibilities
  -Cache contains this address: so access can be performed without involving main memory (HIT)
  -Cache does not contain this address: need to go to main memory to perform this access (MISS)
• On a cache miss, the cache will update itself to store this memory
  address
• Next time, we should get a HIT
• Problem: only a limited number of addresses can be stored in a cache
• Solution: cache needs a replacement policy - which location should be replaced by the new entry?