Exploiting Dark Silicon in Server Design
Dr. Nikos
Hardavellas
Electrical Engineering and Computer Science Department
Northwestern University
Stuart Building 204
Monday, March 21st, 2011
11:30AM - 12:30PM
Abstract: Popular belief holds that, following Moore¹s Law, the number of cores on chip will grow at an exponential rate, leading to a commensurate increase in performance for server applications. Unfortunately, it is becoming extremely difficult to harness performance out of such an abundance of transistors due to a number of technological, circuit, architectural, and programming challenges. I postulate that server chips will not scale beyond a few tens to low hundreds of cores, with an increasing fraction of the chip in future technologies being dark silicon that we cannot afford to power. I will present results backing this argument based on validated models for future server chips across technologies and parameters extracted from real commercial workloads. Then I use these results to project future research directions.
Slides (PDF)
Bio: Nikos Hardavellas is the June and Donald Brewer Assistant Professor of Electrical Engineering and Computer Science at Northwestern University. His research interests include parallel computer architecture, memory systems, runtime environments, optical interconnects, and novel computing systems (heterogeneous, data-intensive, variable-fidelity). Prior to joining Northwestern University, he was a senior engineer at Digital Equipment Corp. (DEC), Compaq Computer Corp., and Hewlett-Packard, and contributed to the design of several generations of Alpha processors and high-end multiprocessor servers. He received a Technical Award for Contributions to the Alpha Microprocessor from Compaq Computer Corp. in 2000, an IEEE Micro Top Picks from Computer Architecture Conferences in 2010, and a Best Demonstration Award in ICDE 2006. Nikos holds a Ph.D. in Computer Science from Carnegie Mellon University.
