cs470 - Fall 2006
Goal

To help students understand the fundamentals of computing by studying the interaction between hardware and software at various levels. Discuss the design trade-offs that drive the performance of computer systems.
Topics covered include Performance Definition, Instruction Set Design, Datapath and Control, Pipelining, the Memory Hierarchy, Input/Output systems.

Prerequisite: CS 350 or ECE 218.

Section 51
Instructor Virgil Bistriceanu
Office hours MT 5:30pm - 6:15pm
Office SB-214
Phone (312) 567-5146
Fax (312) 567-5067
e-mail bistriceanu@iit.edu
Lecture T 6:25 pm - 8:06 pm, SB-201
Lab (SB-112J) R 6:25pm - 8:06pm
Lab Instructor Yawei Li
liyawei@iit.edu
Lab room SB-112J
Teaching Assistant
  • Name: Yawei Li
  • Office: SB-003C
  • Office Hours:
    • W 4:30pm - 5:30pm
    • F 4:30pm - 5:30pm
  • Phone: 312-567-5339
  • email: liyawei@iit.edu
Textbook
"Computer Organization and Design: the hardware/software interface"
David A. Patterson, John L. Hennessy - 3rd edition
Morgan Kaufmann, Inc. Publication Date: 8/2/2004
ISBN 1-55860-604-1

Other books you may want to use to get a better understanding of topics discussed in class, and to explore topics not covered in the textbook and/or in class:

"Memory Systems and Pipelined Processors"
Harvey G. Cragon
Jones and Bartlett, 1995
ISBN 0-86720-474-5


"Computer Architecture"
Michael J. Flynn
Jones and Bartlett, 1995
ISBN 0-86720-204-1


"Computer Systems Design and Architecture"
Vincent P. Heuring, Harry F. Jordan
Addison Wesley, 1997
ISBN 0-201-89589-7
 Grading
  • Homeworks: 21%
  • Laboratory: 21%
  • Midterm: 25%
  • Final: 33%

Work you have to turn is is due as follows:

  • Pre-lab: at the beginning of the lab
  • In-lab: at the end of the lab session
  • Post-lab: at the beginning of next lab session for your section
  • Homework: submit your work work via email to your instructor and CC your TA before midnight the day the homework is due
For late submittal there is a 10% per calendar day penalty.

All the work you submit must be individual.

Academic dishonesty will not be tolerated. Please read IIT's rules and regulations.

Exams are open-book(s) open-notes.

The following grading scale will be used to determine your grade in this class:
  • A: 90 - 100
  • B: 80 - 89
  • C: 70 - 79
  • D: 60 - 69
  • E: 0 - 59 This is a failing grade!

To pass this class you will need to have a passing mark (60+) in each of the following:
  • Homeworks average
  • Labs average
  • Final
Of course, the overall average must be 60+ as well.


Class attendance and participation will help settle the borderline grades. Regular class attendance is important and students are expected to actively participate in class: questions and comments are always welcome.
Topics
  1. Introduction: discuss class structure, objectives, and requirements (1 hour)
  2. Overview and history of computer architecture (1 hour)
  3. Fundamentals of computer design (3 hours)
    • Latency, throughput
    • Comparing performance
    • Design drivers: common case, Amdahl's law, locality
    • MIPS, MPFLOS, benchmarking
  4. Basic organization of a von Neumann computer (1 hour)
    • Control unit, main memory, I/O
    • Instruction execution: fetch, decode, execute
  5. Instruction Set design (3 hours)
    • Instruction Set architectures: 0 (stack), 1 (accumulator), 2, and 3-address
    • Fixed v. variable length instruction sets
    • Memory v. register
    • Addressing modes
    • Flow control instructions
    • Interrupts and I/O
  6. Datapath and Control (4 hours)
    • Single v. multi clock-cycle datapath
    • Control unit: hardwired v. microprogramming
    • Exceptions
  7. Pipelining (4 hours)
    • Pipeline performance
    • Data and control hazards; resolving hazards
    • Exceptions
  8. The memory hierarchy (4 hours)
    • Cache
    • Main memory organization
    • Virtual memory
    • TLB
  9. I/O (3 hours)
    • I/O performance measures
    • Types and characteristics of I/O devices
    • Buses
  10. Midterm exam (2 hours)
  11. Final exam (2 hours)
  12. Project presentation (2 hours)
Total: 30 hours
Lab Schedule

Week of Lab
8/21/06 No lab
8/28/06 No lab
9/4/06 Introduction (nothing due)
9/11/06 pre-lab #1 due, in-lab #1
9/18/06 post-lab #1 due, pre-lab #2 due, in-lab #2
9/25/06 post-lab #2 due, pre-lab #3 due, in-lab #3
10/2/06 post-lab #3 due, pre-lab #4 due, in-lab #4
10/9/06 No lab (nothing due); work on your post-lab #4
10/16/06 No lab due to Fall Break. Nothing due
10/23/06 post-lab #4 due, pre-lab #5 due, in-lab #5
10/30/06 post-lab #5 due, pre-lab #6 due, in-lab #6
11/6/06 No lab (nothing due); work on your post-lab #6
11/13/06 No lab; work on your lab #7
11/20/06 No lab due to Thanksgiving
11/27/06 post-lab #6 due, pre-lab #7 due, in-lab #7. Post-lab #7 is due no later than end od fay 12/4/06.

The instructor for this class reserves the right to change this schedule.
Important Events

Event Section 51
Last Day to Register, Add, Change Courses 9/1/2006
Last day to remove an incomplete grade 10/6/2006
Fall break (no classes) 10/19 through 10/21/2006
Midterm 10/10/2006
Last day for official withdrawal 11/3/2006
Classes end 12/9/2006
Final 12/12/2006, 7:30pm to 9:30pm


The instructor for this class reserves the right to change this schedule.

For more important dates and detail go to the IIT site.
Varia

Unless otherwise stated all papers you turn in will be TYPED. No handwritten work is accepted. Each page will have a header as follows:

  • the left side: your name
  • middle: page number and the total number of pages (ex. 2/5 indicates this is page 2 out of a total of 5)
  • right hand side: name of the assignment (ex. Homework #2)

Each page will also have a footer:

  • the left hand side will contain the following text: cs470-section: Fall 2006 where section stands for the section you are in
  • the right hand side will contain the following text: Illinois Institute of Technology - Computer Science

The header and the footer will be Arial, 10 points, regular. The text for the paper itself will be typed using Times Roman (12 points regular, except for titles which may be larger and bold).

Last update: November 8, 2006 Virgil Bistriceanu cs470 Computer Science
$Id: syllabus.html,v 1.8 2006/11/08 16:08:03 virgil Exp $