I-Format Instructions

What about instructions with immediates?

• 5-bit field only represents numbers up to the value 31: immediates may be much larger than this

• Ideally, MIPS would have only one instruction format (for simplicity): unfortunately, we need to compromise

Define new instruction format that is partially consistent with R-format:

• First notice that, if instruction has immediate, then it uses at most 2 registers.

Define “fields” of the following number of bits each:

Again, each field has a name:

Key Concept:

Only one field is inconsistent with R-format. Most importantly, opcode is still in same location.

What do these fields mean?

opcode: same as before except that, since there’s no funct field, opcode uniquely specifies an I-format instruction
This also answers question of why R-format has two 6-bit fields to identify instruction instead of a single 12-bit field: in order to be consistent with other formats.

rs: specifies the only register operand (if there is one)
rt: specifies register which will receive result of computation (this is why it’s called the target register “rt”)

• addi, slti, slitu, the immediate is sign-extended to 32 bits. Thus, it’s treated as a signed integer.

• 16 bits can be used to represent immediate up to 2 ¹⁶ different values

• This is large enough to handle the offset in a typical lw or sw, plus a vast majority of values that will be used in the slti instruction.